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4inch silicon carbide wafer SiC wafer SiC substrate 4H-N type Dummy grade

Sku. 187627
$ 220 $ 230 save   $10

size*

4inch

Grade*

Dummy

Type*

4h-n
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Stock:
1000 in Stock
Shipping:
$ 44.65
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4inch silicon carbide wafer SiC wafer  SiC substrate 4H-N type Dummy grade

4inch silicon carbide wafer SiC wafer  SiC substrate 4H-N type Dummy grade

4inch silicon carbide wafer SiC wafer SiC substrate 4H-N type Dummy grade

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Product Introduction: 4-Inch Silicon Carbide Wafer, 4H-N Type, Dummy Grade

The 4-inch Silicon Carbide (SiC) wafer of 4H-N type in Dummy Grade is a high-quality, robust wafer designed for various applications, especially in experimental setups and equipment calibration. This dummy-grade wafer is primarily used for testing purposes, such as evaluating processing equipment or experimental procedures, where electrical performance does not need to match that of production-grade wafers. The wafer offers a reliable platform for device prototyping, fabrication process development, and equipment calibration, providing accurate and reproducible results without the need for high-cost production-grade materials.

Applications

  1. Process Development and Calibration: Ideal for calibration of manufacturing equipment and development of SiC wafer processing methods, ensuring consistent process outcomes.
  2. Testing and Prototyping: Suitable for prototyping device structures and layouts, allowing for early-stage testing and experimentation in environments mimicking final production.
  3. Thermal and Mechanical Simulation: Useful for simulations that require the physical attributes of a 4H-N SiC wafer but without the need for electrical functionality.

Properties

  • Diameter: 100.0 mm ± 0.5 mm (4 inches), providing standard compatibility with equipment designed for 4-inch wafers.
  • Thickness: 350 μm ± 25 μm, allowing it to withstand typical fabrication and testing processes.
  • Wafer Orientation: Off-axis by 4.0° toward the <11-20> direction, ± 0.5°, a common orientation for SiC wafers that supports stable device fabrication.
  • Micropipe Density (MPD): 30 cm⁻², indicating that the wafer is not intended for applications requiring high-quality epitaxial layers but is suitable for mechanical and physical testing.
  • Electrical Resistivity: 0.015~0.028 Ohm-cm, providing a representative resistivity profile suitable for non-functional testing.
  • Doping Concentration: Approximately 1E18/cm³ (N-type), making it ideal for applications where electrical neutrality and stability are more crucial than precise doping characteristics.
  • Surface Quality:
    • Surface roughness (Si face) is achieved with CMP Ra < 0.5 nm, while the C face features an Optical Polish Ra < 1 nm, ensuring minimal surface irregularities.
    • Edge chipping is limited to 5 allowable chips of 1 mm each, which is acceptable within dummy-grade standards.

This SiC wafer's robust structure and quality consistency make it an ideal choice for process engineers and researchers involved in preliminary fabrication experiments, equipment testing, and developmental prototyping.

PropertyZero MPD GradeProduction GradeResearch GradeDummy Grade
Diameter100.0 mm ± 0.5 mm100.0 mm ± 0.5 mm100.0 mm ± 0.5 mm100.0 mm ± 0.5 mm
Thickness500 um ± 25 um (semi-insulating type)500 um ± 25 um (semi-insulating type)350 um ± 25 um (N type)350 um ± 25 um (N type)
Wafer OrientationOn axis: <0001> ± 0.5° for 4H-SIOn axis: <0001> ± 0.5° for 4H-SIOff axis: 4.0° toward <11-20> ± 0.5° for 4H-NOff axis: 4.0° toward <11-20> ± 0.5° for 4H-N
Micropipe Density (MPD)1 cm⁻²5 cm⁻²15 cm⁻²30 cm⁻²
Electrical Resistivity (Ohm-cm)4H-N: 0.015~0.0284H-N: 0.015~0.0284H-SI: >1E54H-SI: >1E5
Doping ConcentrationN-type: ~ 1E18/cm³N-type: ~ 1E18/cm³SI-type (V-doped): ~ 5E18/cm³SI-type (V-doped): ~ 5E18/cm³
Primary Flat{10-10} ± 5.0°{10-10} ± 5.0°{10-10} ± 5.0°{10-10} ± 5.0°
Primary Flat Length32.5 mm ± 2.0 mm32.5 mm ± 2.0 mm32.5 mm ± 2.0 mm32.5 mm ± 2.0 mm
Secondary Flat Length18.0 mm ± 2.0 mm18.0 mm ± 2.0 mm18.0 mm ± 2.0 mm18.0 mm ± 2.0 mm
Secondary Flat OrientationSilicon face up: 90° CW from Primary flat ± 5.0°Silicon face up: 90° CW from Primary flat ± 5.0°Silicon face up: 90° CW from Primary flat ± 5.0°Silicon face up: 90° CW from Primary flat ± 5.0°
Edge Exclusion3 mm3 mm3 mm3 mm
LTV/TTV / Bow / Warp10 um / 15 um / 25 um / 40 um10 um / 15 um / 25 um / 40 um10 um / 15 um / 25 um / 40 um10 um / 15 um / 25 um / 40 um
Surface RoughnessOptical Polish Ra < 1 nm on the C faceCMP Ra < 0.5 nm on the Si faceCMP Ra < 0.5 nm on the Si faceCMP Ra < 0.5 nm on the Si face
Cracks (inspected by high-intensity light)NoneNone1 allowed, 1 mm1 allowed, 2 mm
Hex Plates (inspected by high-intensity light)Cumulative area 1%Cumulative area 1%Cumulative area 1%Cumulative area 3%
Polytype Areas (inspected by high-intensity light)NoneNoneCumulative area 2%Cumulative area 5%
Scratches (inspected by high-intensity light)3 scratches to 1 x wafer diameter Cumulative length3 scratches to 1 x wafer diameter Cumulative length5 scratches to 1 x wafer diameter Cumulative length5 scratches to 1 x wafer diameter Cumulative length
Edge ChippingNoneNone3 allowed, 0.5 mm each5 allowed, 1 mm each
Surface Contamination (inspected by high-intensity light)NoneNoneNoneNone
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